Incorporating Time-Domain Reflectometry in Chip-Level Failure Analysis Workflow: Case Studies

 Liao, Joy Y., Khanh Giang, Timothy Pham, and Howard Lee Marks. "Incorporating time-domain reflectometry in chip-level failure analysis workflow: case studies." In International Symposium for Testing and Failure Analysis, vol. 84741, pp. 145-150. ASM International, 2023.

Abstract

Non-destructive electrical fault isolation (FI) techniques such as emission- and laser-based techniques have been utilized widely for chip-level failure analysis (FA). However, these techniques by themselves can sometimes be inadequate for certain failure modes. In this paper, we present six FA case studies using Time-domain Reflectometry (Electro-optical terahertz pulse reflectometry, EOTPR) in combination with the traditional FI techniques. We also present continuing development in making EOTPR accessible to the semiconductor process and packaging communities.

see https://dl.asminternational.org/istfa/proceedings-abstract/ISTFA2023/84741/145/28577